FPGA Project in CS@Fudan
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A PCIe data acquisition board is designed to verify the hardware and algorithm of 8 ADC time interleaved sampling based on Virtex-7 FPGA.
Experiences
Research Program in EE@Fudan
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We propose a joint design of delay compensation and one-way synchronization, which achieves estimation of clock parameters and fluctuated message delays at the same time.
Summer Intern in Wechat Development
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We integrated various protocol interface outside and form an unified authentication platform.
Person Reidentification in EE@Fudan
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We propose a semantic-guided alignment model that uses image semantic information to separate useful information from occlusion noise.